This invention relates to multiplier-accumulator (“MAC”) circuitry and methods. A possible application of the invention is to implement MAC operations on field-programmable gate array (“FPGA”) integrated circuit devices.
Multiplier-accumulator (“MAC”) operations are frequently needed in such applications as digital signal processing (“DSP”). DSP is becoming increasingly important, and more and more widely used. In addition, DSP operations are becoming larger and more complex. Field-programmable gate array (“FPGA”) integrated circuit devices are potentially usable in many applications requiring DSP. However, DSP can consume excessive amounts of FPGA resources unless care is taken in the design of the FPGA to avoid that. Because MAC operations are at the heart of many (if not most) DSP operations, it is important to find ways for FPGAs to perform MAC operations extremely efficiently (e.g., without requiring excessive delay (latency) and without using excessive amounts of either operating or routing circuitry on the FPGA).